0. old, still waiting for ack

1. For the upcoming release ===============================================================================

2. For later releases ===============================================================================
- CLENAUP: disable the old drc plugin by default
- CLEANUP: remove import_sch, rename DeprecatedImport() to Import() in oldactions [report: Igor2]
- CLEANUP: remove the donut rats special casing
	- CLEANUP/BUG: bug_files/donut.lht: {c f} on the line, it will also mark the sorrunding larger poly found for no good reason; it happens if the donut rat is within the polygon hole; cut the poly so it's C shaped around it and it won't happen ml=3497,3623 - see also bug_files/rats.lht - remove donuts? code: pcb_isc_ratp_poly() [report: gpaubert]
- CLEANUP/BUG: undo operation while drawing a multiple segment line doesn't change segment attached to the crosshair [report:wojciechk8]
	- tool_line.c depends on pcb_undo()'s return value; can be fixed only when the old undo system is removed
- CLEANUP: run drc on 7805 with valgrind from the batch GUI and clean up the memleaks [report: Igor2]
- CLEANUP/BUG: new board should delete the design subtree from the config; File>Import>Import schematics dialog does not open after starting new layout and clearing data.  Import schematic from file at trunk/doc/tutorials/7805_gschem.sch as genlist, start new layout { f n }, File>Import>Import schematics imports above file but does not open import dialog to allow user to choose a different file. [report: Miloh] 
- CLEANUP/BUG: rtree getting very badly shaped in no-hole poly dicer, see bug_files/rtree ml=3498 [report: gpaubert, Joe]
- CLEANUP/BUG: add config options on how gtk transient-for and (a new) raise should work [report: Joe, Bdale]
- CLEANUP/BUG: bug_files/pstk_offs.lht - most of the code gets confused if a padstack's shape is far away from the padstack origin; try {c r} or {c f} on R8-1; need to cache hole vs. shape overlap (1 bit per shape in the proto) [report: igor2]
- CLEANUP/BUG: find.c: unplated padtsacks shall not connect layers; bug_files/unplated1.lht; problem: a padstack is either found or not, this affects all layers, there's no info about which layer is found; padstack update should check the hole/slot geo and update a bit for each shape telling whether it's connected or not
- CLEANUP: (TT) propedit revamp:
	- test under lesstif
	- CLEANUP: remove Attrbute() and pcb_act_Attributes -> remove; this should be handled by the property editor when lesstif already supports it.
	- CLEANUP: after the attribute dialog, remove the label argument from the DAD API [report: igor2]
	- CLEANUP: remove attrib.o from the hidlib objects
- CLEANUP: think over how to handle subc selection: selecting all parts automatically is bad for propedit; bug_files/subcsel.bug [report: Wojciech]
	- BUG: propedit adding/deleting attributes inconsistency; search depth problem (see TODO#28)  bug_files/subcsel.bug [report: Ade]
- CLEANUP: lesstif DAD support for top window docks [report: Igor2]
- CLEANUP: layer order from data
	- central code for building a list of layer groups ordered by draw from front to back (omit disabled/invisible layers)
	- rewrite both the draw_everything() and pcb_search_obj_by_location_() layer loop to use this list
	- FEATURE: holes should be drawn below silk and mask - this could be a config setting
- CLEANUP: CAM: in ~2020: remove the hackish gerber layer suffix and auto-excellon in favor of CAM [report: Ade]
- FEATURE: new breadboard
	- FEATURE: PCB_OBJ_GFX
		- TODO("gfx")
		- act_draw() binding
		- tool_arrow: resize
		- rotated pixmap scale adjustment
		- document the new object in the data model
	- FEATURE: hidlib: render pixmap: test in gl
	- DOC: pool node on how to use pixmap for breadboading
- FEATURE: drc progress bar (requires API upgrade on query pcb_qry_run_script() - callback from the outmost iterator)
- FEATURE: netlist dialog: double click on a net should disable rats [report: Joe]
- FEATURE: netlist dialog: button for disable all or enable all [report: Joe]
- FEATURE: padstack prototype edit dialog: geometry column in tab 2 (plain labels) do not respect glboal units [report: Joe]
- FEATURE: optional: when clicked (or pressed a button on) multiple overlapping objects, offer a view about which one to operate on [report: keantoken]
- FEATURE: the padstack proto editor dialog changes are not undoable [report: Gabriel]
- FEATURE: library window: allow long tags and long location text to split: rich text widget
- FEATURE: lesstif DAD support for toggle buttons [report: Igor2]
- FEATURE: Polygon() action to expose our poly bool algebra, e.g. Evan's moon shaped poly example [report: Evan]
- FEATURE: (TT) route style upgrade to prototypes:
	- BUG: set same {e s s} doesn't work on padstacks [report: Igor2]
	- BUG: padstack doesn't show drc xor shape while moving - because the whole drawing is a cheat for old vias [report: igor2]
	- replace the route style dialog box's via part
	- proto copy to buffer - a buffer with a single padstack should also serve as a prototype copy vehicle? or just import by a list from the buffer
	- load/import from buffer and file
	- CLEANUP: remove PCB_MIN_PINORVIA* PCB_DEFAULT_DRILLINGHOLE macros - nothing should use them anymore
	- add text font, update the pool node text_edit [report: Igor2]
- FEATURE: fontsel: ttf import?
- FEATURE/BUG: bug_files/lines - remove zero length objects if they are created as the result of rubber banding [report: Evan]
- FEATURE: DOC: new examples
	- blinking led with parametric footprints
	- example of nonetlist: 1206 jumpers and logos
- export_dsn/new io_dsn (with King Kevin and celem):
	- missing global padstack (via) export:
		- FEATURE: need to think over and check the spec for how to do this with no-hole padstacks
		- RTT tests: thermal_layer.dsn, comp1.dsn, padstack.dsn
	- BUG: elem_pads_ds: do not export line shape in padstacks as polygons, that kills round cap lines
- FEATURE: preview widget: allow to handle keys both in gtk and lesstif
- res/menu:
	- FEATURE: load/swap menus (TODO#1)
	- CLEANUP: search for vendor in the hid plugins, there should be no trace of it (vendor should register its in submenus with anchors)
	- FEATURE: fungw: auto-remove menus by cookie (TODO#2)
	- FEATURE: load new res on the fly (replace the menu system):
		- low level reload code (re-add the dynamic menus too!)
		- action to reload if file name is known
		- gui load dialog with tags listed
	- FEATURE: project specific menus from extra lihata files - maybe from project.lht
- FEATURE: layer binding dialog: manual layer binding (reuse csect?)
- BUG: Lihata persistent save:
	- flag compatibility: save unknown, string-flags as loaded by io_pcb
	- ind: FONTS: second font indents incorrectly
	- ind: indentation bug in inline struct therm: closing } is preceded by indentation whitespace for some reason
	- keep numeric format: test all
	- keep unknown subtrees
	- doc/user/02_model/src/obj_arc.lht: Open/Save : Font section is embedded. Once manually removed, the file shows many diffs w.r.t original. Lihata V1 file.
	- BUG: lhtpers indentation: bug_files/lhtpers_ins/; breakpoint in pers_table.c:34 and debug why the newline is getting in [report: Igor2]
- query & advanced search
	- FEATURE: search expr wizard should pick up the expression from the button when clicked
	- CLEANUP: make a run on a large board, speed test, with -O0 and -O3:
		- iteration speed (a simple @)
		- eval speed (a simple @ with a lot of constants in an expr)
		- geo speed
		- regex and string cmp match speed vs. select by name
- BUG: I/O bugs:
	- eagle:
		- BUG: xml: arc angles in aux/curve_trace/broken_curve [report: vuokko]
		- BUG: bin: eagle binary library load fails with assert when pad dimension == 0, drill != zero. Bug arises from uninitiliased st.ms_width minimum feature width DRC value. This does not manifest in XML load as it initiliased to default value of 10mil before the DRC block is read, and updated if specified in the DRC block. There is no DRC block in an eagle binary library, so a decision has to be made wrt to where a default minimum feature size is to be referred to, so that the pad/hole reading code can apply it when pad dimension is not specified at line 824 in read.c. If dimension is not present, but drill is, read.c correctly applies the DRC derived rv_pad_top at line 818 dia = eagle_get_attrc(st, subtree, "diameter", drill * (1.0+st->rv_pad_top*2.0)); Planned changes to rectangle parsing to geenrate copper rectangles, not four lines, will alter +/- eliminate the need for the rectangle read routine to have ms_width available pre DRC read. See bug_files/e-motoren.lbr. [report: Erich]
		- BUG: bin: text rotations not quite right in eagle binary format layouts. See bug_files/tvbgone3-brd-in-eagle.png. Seems 180 and 270ccw rotation are rendered as upright an 90ccw rotation. Hmm. [erich]
		- BUG: bin: valgrind shows memory leaks relating to binary load. See bug_files/e-motoren.lbr [report: erich]
		- BUG: bin: on loading bug_files/diode.lbr, pcb-rnd's clipping polygon out of existence routine seems to go into a non terminating loop [report: erich]
		- layers for top and bottom soldermask, if not present in loaded eagle file, i.e. tvbgone3.brd, do not export on creating gerbers, and cannot be added easily to layout via layer prefs, since ability to add a soldermask group is lacking [erich].
		- BUG: xml: eagle XML import fails on polygon import reported by miloh, test file pcb-rnd-aux poly_selfi/eagle_polygon_crash.brd [report: erich], due to input file containing an invalid polygon: a self intersecting poly in line 156 - consider handling "width"?
		- bin: eagle binary format appended text block needs to be parsed and the text strings allocated to ASCII-127 references in preceding text blocks [erich] 
		- bin: eagle binary format v3 and libraries do not have a DRC block specifying restring or minimum feature widths. Binary loader should add a DRC block in these cases to the tree with the minimum settings needed for padstacks and features to load sensibly. [erich].
		- bin: padstack clearances for element pins will rely on connectivity to other polygons layer by layer defined in the netlist 
		- bin: need to refine naming of library (.lbr) elements in loaded .lbr files; any text names in the binary tree, if starting with ASCII 127, sequentially reference strings in the text block which comes immediately after the board/design tree. In later eagle binary versions, the text block seems to become a node of the tree, but a node of arbitrary length, not 24 bytes, with length of block still encoded in first few bytes. 
		- bin: need to add support for non top silk (tPlace), tDocu and top copper text in read.c
		- bin: layouts, once loaded, have issue where deselection of elements only deselects element pins/pads. click-drag of element or saving the layout to .lht and reloading fixes the deselection issue. Example FTSH.... library file for a header exhibits this behaviour.
	- revise all I/O plugins for:
		- text thickness
		- text rotation
		- padstacks
		- new outline/mech layers and slots
		- new doc layers
- BUG: lesstif hbox/vbox allocation issues: test with bug_files/ltf_fillbox/ patches applied, with the fontsel action; opening it multiple times will randomly show or hide the button
	- hvbox: fontsel, about dialog: resize to smaller doesn't re-layout
	- tabbed: redisplay bug in the about box
	- re-test HPANE: pstklib(), netlistdialog(), propedit(), BrowseScripts, preferences dialog config tab
	- preferences dialog: library, layers tabs are unusable [report: Igor2]
	- BUG: in lesstif gui, running { s s } issues 94 lines to stderr Warning: Null child found in argument list to unmanage [report: Miloh]
- BUG: excess mkdir on cam export when outfile is edited ml=3959 [report: Majenko]
- BUG: autorouter broke on polygons: bug_files/ara.lht, {a r a}, bisect; broke before r14572 [report: Igor2]
- BUG: bug_files/rat_shortest.lht: because of "don't add non-manhattan lines" part [report: pstuge]
- BUG: bug_files/rubberx.lht: move the horizontal line upward, rubber band breaks the traces (ortho mode) [report: aron]
- BUG: Rubberband move line endpoints ignores connected arc endpoints. [Fixing:Ade]
- BUG: 64 bit coords: make test fails on drc_query thicknesses ml=3953 [report: Evan]

3. Long term ===============================================================================
- version 3.0.0:
	- maybe rename pcblib? dir rename trunk/pcblib/tru-hole should handle make correctly and not walk on existing web services or user installs
	- ./configure --config should default to /etc
- BUG: gtk2_gl: RTT/arc_sizes.lht - elliptical arc corner case render bug [report: Wed]
- BUG: in poly lib rewrite: bug_files/polyclpoly.lht: excess clearing into the corner of the outer poly; move the line a bit and it tends to disappear ml=3493 [report: gpaubert]
- FEATURE: "thermal recipe" so a padstack thermal can be put in a padstack or subc and it is changed with the layer binding [report: jg]
- FEATURE: a {c f}-like feature that doesn't flag the network but prints the net name on objects large enough ; alternative: net name caching and display when zoomed in [report: Majenko]
- FEATURE: netlist2: bug_files/ratside.txt optional rats constraints [report: Vuokko]
- FEATURE: drc preview: follow board flips (should be a DAD preview flag) [report: Igor2]
- FEATURE: draw on move: 'Crosshair shows DRC clearance' should show the clearance also when moving a ... (not only when placing it) [report: wojciechk8]
	- need to precalculate and cache clearance shape in crosshair (polyarea!) because recalculating these for padstacks would be expensive (also rewrite lines and arcs)
	- padstack
	- clearing polygon
	- text
- FEATURE: padstack bbox:
	- per layer: keep a bbox per transformed shape per prototype, then getting the bbox of a padstack ref on a specific layer is looking up the shape, then 4 integer additions [report: Wojciech]
	- when calculating overall padstack bbox, ignore layers that are not present? but then a layer change would require a recalc (but this is true for subcs too!) [report: Wojciech]
- FEATURE: depth controlled mech layers (routed) for internal cavities: http://www.saturnelectronics.com/products_capabilities/internal-cavity_boards.html -> user script, similar to on_every_layer: convert lines into bbvia slot padstacks; only when we already export bbvia in excellon; alternative: layer attribute on mech layers
- FEATURE: key rewrite: (base key swap bug (q<->a, y<->z))
	- for <char> (punctuation): learn key for non-US users
	- lesstif code upgrade for the new API
	- menu file fixup on punctuation in lesstif
- XOR rendering upgrade:
		- experiment with 'emboss' kind of drawing instead of xor so rendering can stay 'direct'
		- if worked: allow padstack xor draw to draw all shapes on all layers
- CLEANUP: layer group rewrite: remove PCB_MAX_LAYERGRP and PCB_MAX_LAYER and make them dynamic
- CLEANUP: reduce: get rid of autorouter/vector.[ch]
- vendor drill plugin:
	- CLEANUP: check if we want to keep vendor name
	- CLEANUP: search for /units, replace it with pcb-printf something
	- CLEANUP: replace ignore_refdes, ignore_value and ignore_descr with genvector
	- FEATURE: vendor: be able to load multiple vendor files (project spec for skips, central for vendor) [report: celem]
	- FEATURE: add round down
- FEATURE: lesstif: implement/enable local grid in lesstif (menu option is disabled)
- FEATURE: lihata v7
	- FEATURE: data model: new object type GFX- save and load
	- FEATURE: data model: object minimal clearance value from the polygon side; final clearance should be MAX(obj->Clearance, poly->Clearance); kicad example: 1 line, 2 polygons with 2 different clearance values - see CUCP#38 provided by Karl [report: Igor2]
	- FEATURE: data model: TODO("v7textclr"): clearance field of text objects; plus invent a flag or attrib to choose between bbox clear or detailed clear [report: Igor2]
	- remove netlist net ->style, should be a plain attribute (but keep the dedicated field in old versions)
	- save and load rat anchor object idpath
	- remove via geometry from route style

4. Low prio ===============================================================================
- FEATURE: footprint in-place replacement should match up floaters to keep their coords, as documented in ML/2304; also keep thermals per term ID [report: gpaubert]
- BUG: 1. place 0603; 2. select; 3. cut to buffer; 4. undo -> 0603 put back but selection is lost; reason: the flag is removed in the buffer, but not in an undoable way as we don't have undo on buffer [report: igor2, miloh]
- BUG?: Far-side silk text can be selected and moved when the mouse is over front-side subcircuit. (but this is what we had with elements too! -> rewrite search.c to be a 'script' config) bug_files/farsilk.lht [report: Ade]
- BUG: RTT/arc_sizes.lht - unable to move arcs which have different width and height [report: Ade] - rewrite pcb_is_point_on_arc() elliptical case at the bottom
- FEATURE: padstack label smarter print: in case of full overlap of a bottom and top "pad", arrange other-side labels to avoid overlaps [report: al3x]
- improve locking:
	- FEATURE: consider a move-only lock?
	- BUG: when thermal and some other operations are applied on a locked element, indicate it
- CLEANUP: insert drag&drop strangeness (mainline too):
	insert should just insert a new point and stop there, not starting a drag&drop
	move; the new point should be marked somehow (e.g. green-find one half of the
	object, like arc split does) lines can be inserted mostly only in all-dir-line
	which is strange
- FEATURE: DRC should warn for thin poly hair
- FEATURE: trace length calculator:
	- click a line or arc or via
	- start a search in two directions mapping lines, arcs and vias connected (green-highlight them, marking them found)
	- stop at the first junction (anywhere where more than 2 objects are connected)
	- stop at polygons
	- display the number of vias and net trace length along the found objects
- FEATURE: io_pcb: new, optional "layer tag" field in mainline's file format
- FEATURE: scconfig: menuconfig and a config file for scconfig: requires a more declarative dependency handling system
